//////////////////////////////////////////ok
#include"stdafx.h"

#include "bochs.h"


void IA32_CPU::SETO_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;

  if (get_OF())
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }
}

void IA32_CPU::SETNO_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (get_OF()==0)
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }

}

void IA32_CPU::SETB_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (get_CF())
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }

}

void IA32_CPU::SETNB_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (get_CF()==0)
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }

}

void IA32_CPU::SETZ_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (get_ZF())
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }

}

void IA32_CPU::SETNZ_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (get_ZF()==0)
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }
}

void IA32_CPU::SETBE_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (get_CF() || get_ZF())
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }
}

void IA32_CPU::SETNBE_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if ((get_CF()==0) && (get_ZF()==0))
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }
}

void IA32_CPU::SETS_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (get_SF())
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }
}

void IA32_CPU::SETNS_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (get_SF()==0)
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }
}

void IA32_CPU::SETP_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (get_PF())
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }
}

void IA32_CPU::SETNP_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (get_PF() == 0)
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }
}

void IA32_CPU::SETL_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (getB_SF() != getB_OF())
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }
}

void IA32_CPU::SETNL_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (getB_SF() == getB_OF())
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }
}

void IA32_CPU::SETLE_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if (get_ZF() || (getB_SF()!=getB_OF()))
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }
}

void IA32_CPU::SETNLE_Eb(Ia32_Instruction_c *i)
{
  Bit8u result_8;
  if ((get_ZF()==0) && (getB_SF()==getB_OF()))
    result_8 = 1;
  else
    result_8 = 0;

  /* now write result back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_8BIT_REGx(i->rm(), i->extend8bitL(), result_8);
  }
  else 
  {
    write_virtual_byte(i->seg(), IA32_RMAddr(i), &result_8);
  }
}

void IA32_CPU::BSF_GwEw(Ia32_Instruction_c *i)
{
  Bit16u op1_16, op2_16;
  /* op2_16 is a register or memory reference */
  if (i->modC0()) 
  {
    op2_16 = IA32_READ_16BIT_REG(i->rm());
  }
  else 
  {
    /* pointer, segment address pair */
    read_virtual_word(i->seg(), IA32_RMAddr(i), &op2_16);
  }

  if (op2_16 == 0) 
  {
    set_ZF(1); /* op1_16 undefined */
    return;
  }

  op1_16 = 0;
  while ( (op2_16 & 0x01) == 0 ) 
  {
    op1_16++;
    op2_16 >>= 1;
  }

  IA32_SET_FLAGS_OSZAPC_RESULT_16(op1_16, IA32_INSTR_BITSCAN16);
  /* now write result back to destination */
  IA32_WRITE_16BIT_REG(i->nnn(), op1_16);
}

void IA32_CPU::BSF_GdEd(Ia32_Instruction_c *i)
{
  /* for 32 bit operand size mode */
  Bit32u op1_32, op2_32;
  /* op2_32 is a register or memory reference */
  if (i->modC0()) 
  {
    op2_32 = IA32_READ_32BIT_REG(i->rm());
  }
  else 
  {
    /* pointer, segment address pair */
    read_virtual_dword(i->seg(), IA32_RMAddr(i), &op2_32);
  }

  if (op2_32 == 0) 
  {
    set_ZF(1); /* op1_32 undefined */
    return;
  }

  op1_32 = 0;
  while ( (op2_32 & 0x01) == 0 ) 
  {
    op1_32++;
    op2_32 >>= 1;
  }

  IA32_SET_FLAGS_OSZAPC_RESULT_32(op1_32, IA32_INSTR_BITSCAN32);
  /* now write result back to destination */
  IA32_WRITE_32BIT_REGZ(i->nnn(), op1_32);
}
 

void IA32_CPU::BSR_GwEw(Ia32_Instruction_c *i)
{
  Bit16u op1_16, op2_16;
  /* op2_16 is a register or memory reference */
  if (i->modC0()) 
  {
    op2_16 = IA32_READ_16BIT_REG(i->rm());
  }
  else 
  {
    /* pointer, segment address pair */
    read_virtual_word(i->seg(), IA32_RMAddr(i), &op2_16);
  }

  if (op2_16 == 0) 
  {
    set_ZF(1); /* op1_16 undefined */
    return;
  }

  op1_16 = 15;
  while ( (op2_16 & 0x8000) == 0 ) 
  {
    op1_16--;
    op2_16 <<= 1;
  }

  IA32_SET_FLAGS_OSZAPC_RESULT_16(op1_16, IA32_INSTR_BITSCAN16);
  /* now write result back to destination */
  IA32_WRITE_16BIT_REG(i->nnn(), op1_16);
}

void IA32_CPU::BSR_GdEd(Ia32_Instruction_c *i)
{
  /* for 32 bit operand size mode */
  Bit32u op1_32, op2_32;
  /* op2_32 is a register or memory reference */
  if (i->modC0()) 
  {
    op2_32 = IA32_READ_32BIT_REG(i->rm());
  }
  else 
  {
    /* pointer, segment address pair */
    read_virtual_dword(i->seg(), IA32_RMAddr(i), &op2_32);
  }

  if (op2_32 == 0) 
  {
    set_ZF(1); /* op1_32 undefined */
    return;
  }

  op1_32 = 31;
  while ( (op2_32 & 0x80000000) == 0 ) 
  {
    op1_32--;
    op2_32 <<= 1;
  }

  IA32_SET_FLAGS_OSZAPC_RESULT_32(op1_32, IA32_INSTR_BITSCAN32);
  /* now write result back to destination */
  IA32_WRITE_32BIT_REGZ(i->nnn(), op1_32);
}


void IA32_CPU::BSWAP_EAX(Ia32_Instruction_c *i)
{
  Bit32u eax, b0, b1, b2, b3;
  eax = EAX;
  b0  = eax & 0xff; eax >>= 8;
  b1  = eax & 0xff; eax >>= 8;
  b2  = eax & 0xff; eax >>= 8;
  b3  = eax;
  EAX = (b0<<24) | (b1<<16) | (b2<<8) | b3;  // zero extended
}

void IA32_CPU::BSWAP_ECX(Ia32_Instruction_c *i)
{
  Bit32u ecx, b0, b1, b2, b3;
  ecx = ECX;
  b0  = ecx & 0xff; ecx >>= 8;
  b1  = ecx & 0xff; ecx >>= 8;
  b2  = ecx & 0xff; ecx >>= 8;
  b3  = ecx;
  ECX = (b0<<24) | (b1<<16) | (b2<<8) | b3;
}

void IA32_CPU::BSWAP_EDX(Ia32_Instruction_c *i)
{
  Bit32u edx, b0, b1, b2, b3;
  edx = EDX;
  b0  = edx & 0xff; edx >>= 8;
  b1  = edx & 0xff; edx >>= 8;
  b2  = edx & 0xff; edx >>= 8;
  b3  = edx;
  EDX = (b0<<24) | (b1<<16) | (b2<<8) | b3;
}

void IA32_CPU::BSWAP_EBX(Ia32_Instruction_c *i)
{
  Bit32u ebx, b0, b1, b2, b3;
  ebx = EBX;
  b0  = ebx & 0xff; ebx >>= 8;
  b1  = ebx & 0xff; ebx >>= 8;
  b2  = ebx & 0xff; ebx >>= 8;
  b3  = ebx;
  EBX = (b0<<24) | (b1<<16) | (b2<<8) | b3;
}

void IA32_CPU::BSWAP_ESP(Ia32_Instruction_c *i)
{

  Bit32u esp, b0, b1, b2, b3;
  esp = ESP;
  b0  = esp & 0xff; esp >>= 8;
  b1  = esp & 0xff; esp >>= 8;
  b2  = esp & 0xff; esp >>= 8;
  b3  = esp;
  ESP = (b0<<24) | (b1<<16) | (b2<<8) | b3;
}

void IA32_CPU::BSWAP_EBP(Ia32_Instruction_c *i)
{

  Bit32u ebp, b0, b1, b2, b3;
  ebp = EBP;
  b0  = ebp & 0xff; ebp >>= 8;
  b1  = ebp & 0xff; ebp >>= 8;
  b2  = ebp & 0xff; ebp >>= 8;
  b3  = ebp;
  EBP = (b0<<24) | (b1<<16) | (b2<<8) | b3;
}

void IA32_CPU::BSWAP_ESI(Ia32_Instruction_c *i)
{

  Bit32u esi, b0, b1, b2, b3;
  esi = ESI;
  b0  = esi & 0xff; esi >>= 8;
  b1  = esi & 0xff; esi >>= 8;
  b2  = esi & 0xff; esi >>= 8;
  b3  = esi;
  ESI = (b0<<24) | (b1<<16) | (b2<<8) | b3;
}

void IA32_CPU::BSWAP_EDI(Ia32_Instruction_c *i)
{

  Bit32u edi, b0, b1, b2, b3;
  edi = EDI;
  b0  = edi & 0xff; edi >>= 8;
  b1  = edi & 0xff; edi >>= 8;
  b2  = edi & 0xff; edi >>= 8;
  b3  = edi;
  EDI = (b0<<24) | (b1<<16) | (b2<<8) | b3;
}


void IA32_CPU::BT_EwGw(Ia32_Instruction_c *i)
{
  ia32_address op1_addr;
  Bit16u op1_16, op2_16, index;
  Bit32s displacement32;

  op2_16 = IA32_READ_16BIT_REG(i->nnn());
  /* op1_16 is a register or memory reference */
  if (i->modC0()) 
  {
    op1_16 = IA32_READ_16BIT_REG(i->rm());
    op2_16 &= 0x0f;
    set_CF((op1_16 >> op2_16) & 0x01);
    return;
  }

  index = op2_16 & 0x0f;
  displacement32 = ((Bit16s) (op2_16&0xfff0)) / 16;
  op1_addr = IA32_RMAddr(i) + 2 * displacement32;
  /* pointer, segment address pair */
  read_virtual_word(i->seg(), op1_addr, &op1_16);
  set_CF((op1_16 >> index) & 0x01);
}

void IA32_CPU::BT_EdGd(Ia32_Instruction_c *i)
{
  ia32_address op1_addr;
  Bit32u op1_32, op2_32, index;
  Bit32s displacement32;

  op2_32 = IA32_READ_32BIT_REG(i->nnn());
  /* op1_32 is a register or memory reference */
  if (i->modC0()) 
  {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
    op2_32 &= 0x1f;
    set_CF((op1_32 >> op2_32) & 0x01);
    return;
  }

  index = op2_32 & 0x1f;
  displacement32 = ((Bit32s) (op2_32&0xffffffe0)) / 32;
  op1_addr = IA32_RMAddr(i) + 4 * displacement32;
  /* pointer, segment address pair */
  read_virtual_dword(i->seg(), op1_addr, &op1_32);
  set_CF((op1_32 >> index) & 0x01);
}


void IA32_CPU::BTS_EwGw(Ia32_Instruction_c *i)
{
  ia32_address op1_addr;
  Bit16u op1_16, op2_16, bit_i, index;
  Bit32s displacement32;

  op2_16 = IA32_READ_16BIT_REG(i->nnn());
  /* op1_16 is a register or memory reference */
  if (i->modC0()) 
  {
    op1_16 = IA32_READ_16BIT_REG(i->rm());
    op2_16 &= 0x0f;
    set_CF((op1_16 >> op2_16) & 0x01);
    op1_16 |= (((Bit16u) 1) << op2_16);
    /* now write diff back to destination */
    IA32_WRITE_16BIT_REG(i->rm(), op1_16);
    return;
  }

  index = op2_16 & 0x0f;
  displacement32 = ((Bit16s) (op2_16 & 0xfff0)) / 16;
  op1_addr = IA32_RMAddr(i) + 2 * displacement32;
  /* pointer, segment address pair */
  read_RMW_virtual_word(i->seg(), op1_addr, &op1_16);
  bit_i = (op1_16 >> index) & 0x01;
  op1_16 |= (((Bit16u) 1) << index);
  write_RMW_virtual_word(op1_16);
  set_CF(bit_i);
}

void IA32_CPU::BTS_EdGd(Ia32_Instruction_c *i)
{
  ia32_address op1_addr;
  Bit32u op1_32, op2_32, bit_i, index;
  Bit32s displacement32;

  op2_32 = IA32_READ_32BIT_REG(i->nnn());

  /* op1_32 is a register or memory reference */
  if (i->modC0()) 
  {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
    op2_32 &= 0x1f;
    set_CF((op1_32 >> op2_32) & 0x01);
    op1_32 |= (((Bit32u) 1) << op2_32);
    /* now write diff back to destination */
    IA32_WRITE_32BIT_REGZ(i->rm(), op1_32);
    return;
  }

  index = op2_32 & 0x1f;
  displacement32 = ((Bit32s) (op2_32&0xffffffe0)) / 32;
  op1_addr = IA32_RMAddr(i) + 4 * displacement32;
  /* pointer, segment address pair */
  read_RMW_virtual_dword(i->seg(), op1_addr, &op1_32);
  bit_i = (op1_32 >> index) & 0x01;
  op1_32 |= (((Bit32u) 1) << index);
  write_RMW_virtual_dword(op1_32);
  set_CF(bit_i);
}


void IA32_CPU::BTR_EwGw(Ia32_Instruction_c *i)
{
  ia32_address op1_addr;
  Bit16u op1_16, op2_16, index;
  Bit32s displacement32;

  op2_16 = IA32_READ_16BIT_REG(i->nnn());
  /* op1_16 is a register or memory reference */
  if (i->modC0()) 
  {
    op1_16 = IA32_READ_16BIT_REG(i->rm());
    op2_16 &= 0x0f;
    set_CF((op1_16 >> op2_16) & 0x01);
    op1_16 &= ~(((Bit16u) 1) << op2_16);
    /* now write diff back to destination */
    IA32_WRITE_16BIT_REG(i->rm(), op1_16);
    return;
  }

  index = op2_16 & 0x0f;
  displacement32 = ((Bit16s) (op2_16&0xfff0)) / 16;
  op1_addr = IA32_RMAddr(i) + 2 * displacement32;
  /* pointer, segment address pair */
  read_RMW_virtual_word(i->seg(), op1_addr, &op1_16);
  bx_bool temp_cf = (op1_16 >> index) & 0x01;
  op1_16 &= ~(((Bit16u) 1) << index);
  /* now write back to destination */
  write_RMW_virtual_word(op1_16);
  set_CF(temp_cf);
}

void IA32_CPU::BTR_EdGd(Ia32_Instruction_c *i)
{
  ia32_address op1_addr;
  Bit32u op1_32, op2_32, index;
  Bit32s displacement32;

  op2_32 = IA32_READ_32BIT_REG(i->nnn());
  /* op1_32 is a register or memory reference */
  if (i->modC0()) 
  {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
    op2_32 &= 0x1f;
    set_CF((op1_32 >> op2_32) & 0x01);
    op1_32 &= ~(((Bit32u) 1) << op2_32);
    /* now write diff back to destination */
    IA32_WRITE_32BIT_REGZ(i->rm(), op1_32);
    return;
  }

  index = op2_32 & 0x1f;
  displacement32 = ((Bit32s) (op2_32&0xffffffe0)) / 32;
  op1_addr = IA32_RMAddr(i) + 4 * displacement32;
  /* pointer, segment address pair */
  read_RMW_virtual_dword(i->seg(), op1_addr, &op1_32);
  bx_bool temp_cf = (op1_32 >> index) & 0x01;
  op1_32 &= ~(((Bit32u) 1) << index);
  /* now write back to destination */
  write_RMW_virtual_dword(op1_32);
  set_CF(temp_cf);
}


void IA32_CPU::BTC_EwGw(Ia32_Instruction_c *i)
{
  ia32_address op1_addr;
  Bit16u op1_16, op2_16, index_16;
  Bit16s displacement16;

  op2_16 = IA32_READ_16BIT_REG(i->nnn());
  index_16 = op2_16 & 0x0f;
  /* op1_16 is a register or memory reference */
  if (i->modC0()) 
  {
    op1_16 = IA32_READ_16BIT_REG(i->rm());
    op1_addr = 0; // keep compiler happy
  }
  else 
  {
    displacement16 = ((Bit16s) (op2_16 & 0xfff0)) / 16;
    op1_addr = IA32_RMAddr(i) + 2 * displacement16;
    read_RMW_virtual_word(i->seg(), op1_addr, &op1_16);
  }

  bx_bool temp_CF = (op1_16 >> index_16) & 0x01;
  op1_16 ^= (((Bit16u) 1) << index_16);  /* toggle bit */
  set_CF(temp_CF);
  /* now write diff back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_16BIT_REG(i->rm(), op1_16);
  }
  else 
  {
    write_RMW_virtual_word(op1_16);
  }
  set_CF(temp_CF);
}

void IA32_CPU::BTC_EdGd(Ia32_Instruction_c *i)
{
  ia32_address op1_addr;
  Bit32u op1_32, op2_32, index_32;
  Bit32s displacement32;

  op2_32 = IA32_READ_32BIT_REG(i->nnn());
  index_32 = op2_32 & 0x1f;
  /* op1_32 is a register or memory reference */
  if (i->modC0()) 
  {
    op1_32 = IA32_READ_32BIT_REG(i->rm());
    op1_addr = 0; // keep compiler happy
  }
  else 
  {
    displacement32 = ((Bit32s) (op2_32 & 0xffffffe0)) / 32;
    op1_addr = IA32_RMAddr(i) + 4 * displacement32;
    read_RMW_virtual_dword(i->seg(), op1_addr, &op1_32);
  }
  bx_bool temp_CF = (op1_32 >> index_32) & 0x01;
  op1_32 ^= (((Bit32u) 1) << index_32);  /* toggle bit */
  set_CF(temp_CF);
  /* now write diff back to destination */
  if (i->modC0()) 
  {
    IA32_WRITE_32BIT_REGZ(i->rm(), op1_32);
  }
  else 
  {
    write_RMW_virtual_dword(op1_32);
  }

}



void IA32_CPU::BT_EvIb(Ia32_Instruction_c *i)
{
  if (i->os32L()) 
  { /* 32 bit operand size mode */
    /* for 32 bit operand size mode */
    Bit32u op1_32;
    Bit8u op2_8 = i->Ib() & 0x1f;
    /* op1_32 is a register or memory reference */
    if (i->modC0()) 
	{
      op1_32 = IA32_READ_32BIT_REG(i->rm());
    }
    else 
	{
      /* pointer, segment address pair */
      read_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
    }
    set_CF((op1_32 >> op2_8) & 0x01);
  }
  else 
  { /* 16 bit operand size mode */
    Bit16u op1_16;
    Bit8u op2_8 = i->Ib() & 0xf;
    /* op1_16 is a register or memory reference */
    if (i->modC0()) 
	{
      op1_16 = IA32_READ_16BIT_REG(i->rm());
    }
    else 
	{
       /* pointer, segment address pair */
       read_virtual_word(i->seg(), IA32_RMAddr(i), &op1_16);
    }

    set_CF((op1_16 >> op2_8) & 0x01);
   }
}

void IA32_CPU::BTS_EvIb(Ia32_Instruction_c *i)
{

	if (i->os32L()) 
	{   /* 32 bit operand size mode */
		/* for 32 bit operand size mode */
		Bit32u op1_32;
		Bit8u op2_8 = i->Ib() & 0x1f;
		/* op1_32 is a register or memory reference */
		if (i->modC0()) 
		{
			op1_32 = IA32_READ_32BIT_REG(i->rm());
		}
		else 
		{
			/* pointer, segment address pair */
			read_RMW_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
		}

		bx_bool temp_CF = (op1_32 >> op2_8) & 0x01;
		op1_32 |= (((Bit32u) 1) << op2_8);
		/* now write diff back to destination */
		if (i->modC0()) 
		{
			IA32_WRITE_32BIT_REGZ(i->rm(), op1_32);
		}
		else 
		{
			write_RMW_virtual_dword(op1_32);
		}
		set_CF(temp_CF);
  }
  else 
  { /* 16 bit operand size mode */
		Bit16u op1_16;
		Bit8u op2_8 = i->Ib() & 0xf;
		/* op1_16 is a register or memory reference */
		if (i->modC0()) 
		{
			op1_16 = IA32_READ_16BIT_REG(i->rm());
		}
		else 
		{
			/* pointer, segment address pair */
			read_RMW_virtual_word(i->seg(), IA32_RMAddr(i), &op1_16);
		}

		bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
		op1_16 |= (((Bit16u) 1) << op2_8);
		/* now write diff back to destination */
		if (i->modC0()) 
		{
			IA32_WRITE_16BIT_REG(i->rm(), op1_16);
		}
		else 
		{
			write_RMW_virtual_word(op1_16);
		}
		set_CF(temp_CF);
  }

}

void IA32_CPU::BTC_EvIb(Ia32_Instruction_c *i)
{
  if (i->os32L()) 
  { /* 32 bit operand size mode */
		/* for 32 bit operand size mode */
		Bit32u op1_32;
		Bit8u op2_8 = i->Ib() & 0x1f;
		/* op1_32 is a register or memory reference */
		if (i->modC0()) 
		{
			op1_32 = IA32_READ_32BIT_REG(i->rm());
		}
		else 
		{
			/* pointer, segment address pair */
			read_RMW_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
		}

		bx_bool temp_CF = (op1_32 >> op2_8) & 0x01;
		op1_32 ^= (((Bit32u) 1) << op2_8);  /* toggle bit */
		set_CF(temp_CF);
		/* now write diff back to destination */
		if (i->modC0()) 
		{
			IA32_WRITE_32BIT_REGZ(i->rm(), op1_32);
		}
		else 
		{
			write_RMW_virtual_dword(op1_32);
		}
  }
  else 
  { /* 16 bit operand size mode */
		Bit16u op1_16;
		Bit8u op2_8 = i->Ib() & 0xf;
		/* op1_16 is a register or memory reference */
		if (i->modC0()) 
		{
			op1_16 = IA32_READ_16BIT_REG(i->rm());
		}
		else 
		{
			/* pointer, segment address pair */
			read_RMW_virtual_word(i->seg(), IA32_RMAddr(i), &op1_16);
		}

		bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
		op1_16 ^= (((Bit16u) 1) << op2_8);  /* toggle bit */
		set_CF(temp_CF);
		/* now write diff back to destination */
		if (i->modC0()) 
		{
			IA32_WRITE_16BIT_REG(i->rm(), op1_16);
		}
		else 
		{
			write_RMW_virtual_word(op1_16);
		}
  }
}

void IA32_CPU::BTR_EvIb(Ia32_Instruction_c *i)
{

	if (i->os32L()) 
	{ /* 32 bit operand size mode */
		/* for 32 bit operand size mode */
		Bit32u op1_32;
		Bit8u op2_8 = i->Ib() & 0x1f;
		/* op1_32 is a register or memory reference */
		if (i->modC0()) 
		{
			op1_32 = IA32_READ_32BIT_REG(i->rm());
		}
		else 
		{
			/* pointer, segment address pair */
			read_RMW_virtual_dword(i->seg(), IA32_RMAddr(i), &op1_32);
		}

		bx_bool temp_CF = (op1_32 >> op2_8) & 0x01;
		op1_32 &= ~(((Bit32u) 1) << op2_8);
		/* now write diff back to destination */
		if (i->modC0()) 
		{
			IA32_WRITE_32BIT_REGZ(i->rm(), op1_32);
		}
		else 
		{
			write_RMW_virtual_dword(op1_32);
		}
		set_CF(temp_CF);
  }
  else 
  { /* 16 bit operand size mode */
		Bit16u op1_16;
		Bit8u op2_8 = i->Ib() & 0xf;
		/* op1_16 is a register or memory reference */
		if (i->modC0()) 
		{
			op1_16 = IA32_READ_16BIT_REG(i->rm());
		}
		else 
		{
			/* pointer, segment address pair */
			read_RMW_virtual_word(i->seg(), IA32_RMAddr(i), &op1_16);
		}

		bx_bool temp_CF = (op1_16 >> op2_8) & 0x01;
		op1_16 &= ~(((Bit16u) 1) << op2_8);
		/* now write diff back to destination */
		if (i->modC0()) 
		{
			IA32_WRITE_16BIT_REG(i->rm(), op1_16);
		}
		else 
		{
			write_RMW_virtual_word(op1_16);
		}
		set_CF(temp_CF);
  }

}

